SANTA CLARA, CA At the Flash Memory Summit (#FMS2022) – August 2, 2022 – Avery Design Systems today announced that its fully-tested Verification IP (VIP) for 800Gbps Ethernet can now be used to perform virtual network co-simulation for the full layer Ethernet 2-7 network stack. The combination of the VIP and a virtual co-simulation/co-emulation system enables the running of full hardware/software system verification on pre-silicon SoC RTL and software integrations. System designers can now perform system-level validation of an SoC design’s Ethernet and TCP/IP network interfaces using real network traffic workloads of communication, datacenter, and storage network protocols running on either host OS or virtual machine (guest OS) platforms.
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- Avery Design System’s Ethernet VIP can now perform virtual network co-simulation for the full layer Ethernet 2-7 network stack.
- Avery Design Systems announces CXL3.0 VIP
- Solid state storage controller startup, TenaFe, leverages Avery VIP for time to market and verification advantages
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Avery Design Systems
Source: Avery Design Systems
Distributed by: Reportable, Inc.
Source: Financial Content